1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device.
2. Description of the Related Art
In recent years, as wirings of semiconductor devices, Cu has been used instead of Al, for the purpose of enhancing resistance against migrations such as electromigration (EM) and stress migration (SM) which become the causes of reduction in wiring resistance and wiring failure.
Processing by RIE (reactive ion etching) as is performed for Al is difficult to perform for Cu. Therefore, a damascene method is used for formation of a Cu wiring. In the damascene method, a wiring groove and a via hole are formed in advance in the surface of an insulating film, and a Cu film is formed on the insulating film, whereby Cu is buried in the wiring groove and via hole. Thereafter, an unnecessary Cu film is removed by chemical mechanical polishing, and the Cu wiring is formed.
For formation of the Cu film by a damascene method, electrolytic plating is widely used. In order to improve burying property and flatness of the Cu film surface, predetermined amounts of additives such as an accelerator, a suppressor and a leveler are included in a plating solution used for electrolytic plating, in addition to Cu ions, for example. These additives are taken in the Cu film as impurities.
Incidentally, as the factor which degrades the reliability of a wiring, micro-voids which occur at the time of formation of a Cu film are conceivable. Micro-voids become the initial voids of an EM defect and an SM defect. If the initial voids exist, voids grow during supplying a current to the wiring or keeping the wiring at a high temperature, and EM reliability and SM reliability are significantly reduced. Therefore, the measures to suppress occurrence of micro-voids are desired.
Here, the art of forming a metal film containing bias sputter copper containing different kinds of elements on a plated copper film is disclosed (see JP-A 2004-40022 (KOKAI)). According to the art, different kinds of elements diffuse in the plated copper film by thermal treatment, and therefore, EM reliability and SM reliability can be enhanced. However, different kinds of metals diffuse in the copper film in parallel or behind the crystal grain growth of Cu by thermal treatment, and therefore, void growth at the time of thermal treatment is difficult to inhibit. Since the film growing methods of the plated copper film and the metal film containing bias sputter copper differ from each other, they are divided into two layers. Accordingly, when such a plated copper film and a metal film containing bias sputter copper are thermally treated, the crystal grain growth of Cu starts from the portion near an interface with the metal film containing bias sputter copper in the plated copper film, the crystal defect existing in the plated copper film is not eliminated, and there is the fear of occurrence of micro-voids.